The present invention relates to an electronic device and a lead frame thereof and particularly to a semiconductor device having a plurality of outer leads and the lead frame thereof.
A semiconductor device is formed of a chip supporting means, a semiconductor chip fixed on the supporting means, a plurality of leads arrayed around the chip, wires for connecting electrically the chip and the leads, and a sealing means for sealing partly the chip supporting means, the chip, the wires and the leads. The leads have internal leads (or inner leads otherwise) sealed around and external leads (or outer leads otherwise) coming out of the sealing means. A mounting of the semiconductor device is carried out generally by connecting the outer leads to the wiring on a substrate through solder.
Improvements in manufacturing techniques of the semiconductor device has naturally stimulated a realization of high integration and multifunction of a large scale integrated circuit (LSI). A tendency is consequently such that the semiconductor device is pinned too much. However, a small and thin package allowing a high density mounting is still required strongly, and the package is sorted according to the type thereof. The situation is reported in a journal "Nikkei Electronics" published by Nikkei McGraw-Hill Inc., dated June 4, 1984 at pp. 141 to 152.
The semiconductor device for which outer leads come out of a sealer is classified largely into two kinds according to the packaging states of the outer leads. One kind is an outer lead insertion packaging type wherein the outer leads are inserted in holes perforated in a wiring substrate in the course of packaging. For example, a dual in-line package (hereinafter called DIP) wherein the outer leads project in two directions from a sealer side and are bent in the same direction will correspond to the semiconductor device of the outer lead insertion packaging type. Since DIP is mounted with a predetermined interval formed between the wiring substrate and the sealer at the time of packaging, it simplifies replacement. The other kind is a surface packaging type wherein the outer leads are mounted one over another on the surface of a wiring electrode formed on the wiring substrate. A small out-line package (hereinafter called SOP) and a flat package (hereinafter called FP) wherein a soldered surface of the outer leads comes within the same plane with a surface given by the sealer back correspond to the semiconductor device of the surface packaging type. Since SOP and FP are small, thin and lightweight, a high packaging density is realizable, and thus the wiring substrate can be made lightweight and miniaturized preferably thereby.
On the other hand, the semiconductor device is ready for packaging automatically on the wiring substrate by the machine, and as disclosed in the above-cited report, a bend arising on the outer leads may stop the packaging work.